notes:flashcart:acekard2i
Differences
This shows you the differences between two versions of the page.
| Next revision | Previous revision | ||
| notes:flashcart:acekard2i [2023/10/14 15:01] – created asie | notes:flashcart:acekard2i [2023/10/31 13:13] (current) – asie | ||
|---|---|---|---|
| Line 1: | Line 1: | ||
| - | ====== Acekard 2i (NDS) programming ====== | + | ====== Acekard |
| + | |||
| + | Original research provided primarily by Normmatt. | ||
| ===== Hardware variants ===== | ===== Hardware variants ===== | ||
| + | |||
| + | ==== Acekard 2, HW-40 (0x40) ==== | ||
| ==== Acekard 2i, HW-44 (0x44) ==== | ==== Acekard 2i, HW-44 (0x44) ==== | ||
| ==== Acekard 2i, HW-81 (0x81) ==== | ==== Acekard 2i, HW-81 (0x81) ==== | ||
| - | |||
| - | ==== R4i Gold 3DS RTS (0xA7) ==== | ||
| - | |||
| - | Encryption: For each written byte, map bits as follows; perform the opposite for decryption. | ||
| - | |||
| - | < | ||
| - | 76543210 | ||
| - | |||||||| | ||
| - | vvvvvvvv | ||
| - | 52016734 | ||
| - | </ | ||
| ===== Commands ===== | ===== Commands ===== | ||
| Line 58: | Line 51: | ||
| ==== Write byte to flash (D4 ac ab aa va A0 00 63; HW-81) ==== | ==== Write byte to flash (D4 ac ab aa va A0 00 63; HW-81) ==== | ||
| - | |||
| - | * (MSB) ac, ab, aa (LSB) - address | ||
| - | * va - byte to write | ||
| - | |||
| - | ==== Read flash (A5 ad ac ab aa 00 00 00; R4i Gold 3DS RTS) ==== | ||
| - | |||
| - | * (MSB) ad, ac, ab, aa (LSB) - address | ||
| - | |||
| - | Returns 512 bytes of data. | ||
| - | |||
| - | ==== Erase flash (DA ac ab aa 00 01 00 00; R4i Gold 3DS RTS) ==== | ||
| - | |||
| - | * (MSB) ac, ab, aa (LSB) - address | ||
| - | |||
| - | ==== Write byte to flash (DA ac ab aa va 03 00 00; R4i Gold 3DS RTS) ==== | ||
| * (MSB) ac, ab, aa (LSB) - address | * (MSB) ac, ab, aa (LSB) - address | ||
notes/flashcart/acekard2i.1697295672.txt.gz · Last modified: by asie
